The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having an asymmetric bulb-type recess gate which increases the effective channel length and prevents the threshold voltage from decreasing under the reciprocal influence between gates, and a method for manufacturing the same.
As the design rule for developing the semiconductor devices falls below a 100 nm level, a short channel effect, in which the threshold voltage quickly decreases due to the reduction of the channel length, becomes more critical. Therefore, limitations necessarily exist in the process and device configuration when attaining a target threshold voltage as required in a semiconductor device using the conventional plane transistor structure.
Consequently, in order to overcome the problems induced by the short channel effect, a semiconductor device having a recess gate is disclosed in the conventional art. In such a conventional semiconductor device, a groove is first defined on an area of the silicon substrate, and the gate is subsequently formed in the groove such that an effective channel length is increased.
Further, a technique for defining a bulb-type groove during the manufacture of semiconductor devices of sub 70 nm is disclosed in the conventional art. The recess gate (hereinafter referred to as “the bulb-type recess gate”) formed in the bulb-type groove allows the effective channel length to be further increased when compared to a typical recess gate; and the doping concentration of a substrate to be further decreased; and a drain-induced barrier lowering (“DBIL”) characteristics to be further improved.
FIG. 1 is a cross-sectional view illustrating a conventional semiconductor device having a bulb-type recess gate. A device isolation structure 102 is formed on a silicon substrate 101 to delimit (or define) an active region. The bulb-type groove H1 is defined in the gate forming area of the active region, and the bulb-type recess gate 110 is formed in the bulb-type groove H1.
Also, gate spacers 115, each comprising a double layer composed of an oxide layer 115a and a nitride layer 115b, are respectively formed on both sidewalls of the bulb-type recess gate 110. Source and drain areas 116 and 117 are respectively formed on the surface of the silicon substrate 101 on both sides of the bulb-type recess gate 110. Landing plugs 119 are formed on areas between bulb-type recess gates 110, including the gate spacers 115, on the source and drain areas 116 and 117.
In FIG. 1, the reference numerals 111 to 114 and 118 designate: a gate oxide layer 111, a gate polysilicon layer 112, a gate tungsten silicide layer 113, a gate hard mask layer 114, and an interlayer insulation layer 118.
Since the semiconductor device having a bulb-type recess gate possesses a recessed channel structure, the short-channel effect is improved when compared to a conventional semiconductor device with a basic planar channel structure. Also, because the lower end of the groove has a spherical profile, the effective channel length is further increased when compared to a semiconductor device containing a typical recess gate characterized by a vertical profile.
Although the conventional bulb-type recess gate as described above provides some advantages to a conventional semiconductor device having the bulb-type recess gate, numerous problems exist in that, since the lower end of the gate is shaped like a bulb, the interval between the lower ends of adjoining gates is decreased. Therefore, the operation of one gate in a certain cell decreases the threshold voltage of the other gate, thereby degrading the leakage current characteristics and causing a critical problem. As a result, difficulties exist in adopting the bulb-type recess gate in the conventional art.